Code Optimization Techniques for Embedded Processors: Methods, Algorithms, and Tools

The building blocks of today's embedded systems-on-a-chip are complex IP components and programmable processor cores. This means that more and more system functionality is implemented in software rather than in custom hardware. In turn, this indicates a growing need for high-level language compilers, capable of generating efficient code for embedded processors. However, traditional compiler technology hardly keeps pace with new developments in embedded processor architectures. Many existing compilers for DSPs and multimedia processors therefore produce code of insufficient quality with respect to performance and/or code size, and a large part of software for embedded systems is still being developed in assembly languages. As both embedded software as well as processors architectures are getting more and more complex, assembly programming clearly violates the demands for a short time-to-market and high dependability in embedded system design. The goal of this book is to provide new methods and techniques to software and compiler developers, that help to make the necessary step from assembly programming to the use of compilers also in embedded system design.
Code Optimization Techniques for Embedded Processors discusses the state-of-the-art in the area of compilers for embedded processors. It presents a collection of new code optimization techniques, dedicated to DSP and multimedia processors. These include: compiler support for DSP address generation units, efficient mapping of data flow graphs to irregular architectures, exploitation of SIMD and conditional instructions, as well as function inlining under code size constraints. Comprehensive experimental evaluations are given for real-life processors, that indicate the code quality improvements which can be achieved as compared to earlier techniques. In addition, C compiler frontend issues are discussed from a practical viewpoint.
Code Optimization Techniques for Embedded Processors is intended for researchers and engineers active in software development for embedded systems, and for compiler developers in academia and industry.

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Written for software and compiler developers, this book offers new techniques and methods for moving from assembly programming to the use of compilers in embedded system design. It presents a collection of code optimization techniques, dedicated to DSP and multimedia processors. These include: compiler support for DSP address generator units, efficient mapping of data flow graphs to irregular architectures, exploitation of SIMD and conditional instructions, and function in-lining under code size constraints. Experimental evaluations are given for real-life processors, indicating code quality improvements. And C compiler front-end issues are addressed. Leupers teaches at the University of Dortmund. Annotation c. Book News, Inc., Portland, OR (booknews.com)

Dr. Rainer Leupers is a senior researcher and lecturer at the Department of Computer Science of the University of Dortmund, Germany. He obtained the Diploma and Ph.D. degrees in Computer Science with distinction from the University of Dortmund in 1992 and 1997, respectively, where he specialized in computer engineering and VLSI CAD. He received a scholarship from Siemens AG and awards for out standing theses. Since 1993, he has been working with Prof.

Peter Marwedel as a member of the Embedded Systems Group at Dortmund, where he is responsible for research projects in the area of compilers for embedded processors. Dr. Leupers has been a co-organizer of the SCOPES (Software and Compilers for Embedded Systems) workshop series, and he serves in the program committees of several design automation, DSP, and compiler conferences. In 1997, he authored the book Retargetable Code Generation for Digital Signal Processors, published by Kluwer. In addition to his research and teaching activities, Dr. Leupers is responsible for commercial compiler development projects at the ICD technology transfer company at Dortmund.