Electronics - Circuits - Logic, Circuits - Computer Hardware, Electronics - Circuits - General
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Overview
This comprehensive analysis of a newly developed asynchronous circuit family covers circuit theory, practical circuits, design tools and an example of the design of a simple asynchronous microprocessor using the circuit family.
Editorials
Matched delay mechanisms in asynchronous bundled data computer systems can cause huge headaches in the design process. The quasi delay-insensitive (QDI) model was developed to help overcome this problem. Nyström and Martin (both of the Department of Computer Science, California Institute of Technology) present a design style that retains the system-simplifying property of QDI design, while limiting the use of timing assumptions. They study a microprocessor design consisting of single-track-handshake asynchronous-pulse-logic (STAPL) circuits, most of which were designed using Pipeline Language 1. Evaluating the microprocessor's performance, they find that the STAPL circuit family allows for higher performance at a small extra cost in energy. Annotation c. Book News, Inc., Portland, OR
Book Details
Published
December 7, 2010
Publisher
Springer-Verlag New York, LLC
Pages
231
Format
Paperback
ISBN
9781441952844