Computer Organization and Design : The Hardware/Software Interface

Using a distinctive "learning by evolution" approach the authors present each idea from its first principles, guiding readers through a series of worked examples that incrementally add more complex instructions until they have acquired an understanding of the entire MIPS instruction set and the fundamentals of assembly language. Computer arithmetic, pipelining, and memory hierarchies are treated to the same evolutionary approach with worked examples and incremental drawings supporting each new level of sophistication. The design, performance, and significance of I/O systems is also discussed in depth, and an entire chapter is devoted to the emerging architectures of multiprocessor systems.

* Real Stuff provides relevant, tangible examples of how the concepts from the chapter are implemented in commercially successful products.
* Fallacies and Pitfalls share the hard-won lessons of the authors and other designers in industry.
* Big Pictures allow the reader to keep major insights in focus while studying the details.
* Key terms, all fully defined in an end-of-book glossary, summarize the essential ideas introduced inthe chapter.

The prior edition of this text is a computer science classic, and now has been updated to reflect the rapid evolution of software and hardware trends, concepts, issues and technologies. Although this is an undergraduate CS text, it's not an introductory one. It lays a solid foundation for the student, then plumbs the boundary between hardware and software as described and defined by architecture specifications, computer design principles, and best described in the author's words, "...where compilation (in software) ends and interpretation (in hardware) begins." The book discusses concepts of computer abstraction, technology, and performance issues. It initiates the process of "learning by evolution" of assembly language instructions and numbers, datapath and control concepts, pipelining and performance enhancement.

Hennessy''s original research area was optimizing compilers. His research group at Stanford developed many of the techniques now in commercial use. In 1981, he started the MIPS project at Stanford with a handful of graduate students. After completing the project in 1984, he took a one-year leave of absence from the university to co-found MIPS Computer Systems, which has since merged with Silicon Graphics. Hennessy's recent research at Stanford focuses on the area of designing and exploiting multiprocessors. Most recently, he has been involved in the development of the DASH multiprocessor architecture, one of the first distributed shared-memory multiprocessors.

David A. Patterson (University of California at Berkeley) has taught computer architecture since joining the faculty in 1977, and is holder of the E.H. and M.E. Pardee Chair of Computer Science. He is a member of the National Academy of Engineering and is a Fellow of both the IEEE and the Association for Computing Machinery (ACM). His teaching has been honored by the ACM with the Outstanding Educator Award and by the University of Californiawith the Distinguished Teaching Award. He also received the inaugural Outstanding Alumnus Award of the UCLA Computer Science Department.

Past chair of the CS Division in the EECS department at Berkeley and the ACM Special Interest Group in Computer Architecture, he is currently chair of the Computing Research Association. He has consulted for many companies, including Digital, HP, Intel, and Sun, and is also co-author of five books.

At Berkeley, he led the design and implementation of RISC I, likely the first VLSI Reduced Instruction Set Computer. This research became the foundation of the SPARC architecture, currently used by Fujitsu, ICL, Sun, TI, and Xerox. He was also a leader of the Redundant Arrays of Inexpensive Disks (RAID) project, which led to high performance storage systems from many companies. These projects led to three distinguished dissertation awards from the ACM. His current research interests are in large-scale computing using networks of workstations (NOW).