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Overview
Verbal explanations are favored over mathematical formulas, graphs are kept to a minimum, and line drawings are used in this user-friendly book. Clear guidance and advice are provided for those professionals who lay out analog circuits. Matching of resistors and capacitors: Includes causes of mismatch, particularly the hydrogen effect and package shift. MOS Transistors: Covers a brief history of floating gate devices, EPROM and EEPROM. Applications of MOS transistors: Expands information on failure mechanisms, including BVdss/Bvdii, SILC, NBTI/PTBI and GIDL and the difference between electrical and electrothermal SOA. Consideration of failure mechanisms as crucial to layout: Integrates further information into many chapters covering various devices. Standard bipolar, polygate CMOS and analog BiCMOS: Covers all three fundamental processes. A valuable reference for professional layout designers.
Synopsis
The first textbook in the field. This text provides students with a broad understanding of the issues involved in successfully laying out analog integrated circuits—ranging from the mechanics of layout to essential information about many related areas, such as device physics, processing, failure modes and effects, device operation, parasitics, and matching. It emphasizes practical knowledge.
Features:
- A practical, authoritative perspective—Based on the author's extensive industry experience, both as a circuit designer and a layout designer. Discusses many mechanisms and effects that are not widely known or understood outside of the industry.
- Familiarizes students with state-of-the-art knowledge and techniques as they are applied in industry today.
- Specifically written for layout designers—Keeps mathematics to a minimum, requiring only a familiarity with basic algebra and elementary electronics. Includes additional background information allowing the reader to understand the material without reference to texts on device physics or semiconductor fabrication.
- This book can be understood by a wide range of readers, i.e., undergraduate students and practicing layout designers as well as graduate students and professional engineers.
- Effects of variations in layout geometries—Discuses how variations in layout geometries affect the performance of devices fabricated in silicon.
- Allows students to make intelligent choices between different device styles, shapes and arrangements, even when (as is usually the case) little data is available upon which to base the selection.
- Carrier-based model—For understanding device operation.
- Provides students with a far more intuitive model than the older component-based models, and offers a much closer analogy to the underlying device physics.
- A focus on three processes—Standard bipolar, polysilicon-gate CMOS and analog BiCMOS. Virtually all modern analog processes trace their lineage to one of these three processes.
- Enables students to comprehend almost any new process that they are called upon to use.