Overview
The specific goal of VHDL for Designers is not only to teach VHDL but also to describe how to use VHDL when designing an electronic system with modern design tools. The synthesis tools Synopsys, Mentor Graphics and ViewLogic are used.
Synopsis
The specific goal of VHDL for Designers is not only to teach VHDL but also to describe how to use VHDL when designing an electronic system with modern design tools. The synthesis tools Synopsys, Mentor Graphics and ViewLogic are used.
Booknews
Several introductory chapters are followed by detailed coverage of concurrent and sequential VHDL; library, package, and subprograms; structural VHDL; RAM and ROM; testbench; state machines; RTL synthesis; design and test methodology; rapid prototyping; common design errors and how to avoid them; design examples and tips; development tools; behavioral synthesis; and labs. Provides solutions to selected exercises. Annotation c. by Book News, Inc., Portland, Or.