Computer Graphics & Design, Electrical & Electronic Engineering, CAD/CAM, Engineering, Electrical & Electronic Engineering, Computers - General & Miscellaneous
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Overview
Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to performance parameters such as power and area. A unified approach to performance analysis and optimization of sequential circuits is presented. The state of the art in timing analysis and optimization techniques are described for circuits using edge-triggered or level-sensitive memory elements. Specific emphasis is placed on two methods that are true sequential timing optimizations techniques: retiming and clock skew optimization. Timing Analysis and Optimization of Sequential Circuits is written for graduate students, researchers and professionals in the area of CAD for VLSI and VLSI circuit design.Editorials
Booknews
One has to applaud a text for engineers in the area of CAD for VLSI circuit design that begins by stating that the authors "feel obligated to switch from the language of Dilbert cliches to plain English." In presenting a unified approach to designing fast, low power chips for increasingly complex systems, Maheshwari (Iowa State U.) and Sapatnekar (U. of Minnesota) overview techniques for analysis and performance optimization of combinational and sequential circuits; compare the assets and disadvantages of edge- triggered and level-triggered clocking disciplines; and discuss deliberate skews and retiming techniques to improve circuit behavior, offering some new algorithms. Annotation c. Book News, Inc., Portland, OR (booknews.com)Book Details
Published
October 28, 2012
Publisher
Springer-Verlag New York, LLC
Pages
205
Format
Paperback
ISBN
9781461375791